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1.8cm (0.7-inch) color lcd panel description the LCX020BK is a 1.8cm diagonal active matrix tft-lcd panel addressed by polycrystalline silicon super thin film transistors with built-in peripheral driving circuit. this panel provides full-color representation. rgb dots are arranged in a striped pattern optimum for data applications and capable of displaying fine text and vertical lines. the adoption of an advanced on-chip black matrix realizes a high luminance screen, and high picture quality is possible with built-in cross talk free and ghost free circuits. this panel has a polysilicon tft high-speed scanner and built-in function to display images up/down and/or right/left inverse. in addition, the built-in 5v interface circuit leads to lower voltage of timing and control signals. the panel contains a display area varying circuit which supports macintosh16 * 1 /svga/vga/pc98 * 2 data signals by changing the display area according to the type of input signal. in addition, double-speed processed ntsc/pal/wide can also be supported. * 1 "macintosh" is a trademark of apple company inc. * 2 "pc98" is a trademark of nec. features number of active dots: 1,557,000, 1.8cm (0.7-inch) in diagonal supports macintosh16 (832 624), svga (800 600), vga (640 480) and pc98 (640 400) display supports ntsc (640 480), pal (762 572) and wide (832 480) display by processing the video signal at double speed high optical transmittance: 1% (typ.) built-in cross talk free circuit high contrast ratio with normally white mode: 70 (typ.) built-in h and v drivers (built-in input level conversion circuit, 5v driving possible) up/down and/or right/left inverse display function element structure dots: 2496 (h) 624 (v) = 1,557,504 built-in peripheral driving circuit using polycrystalline silicon super thin film transistors applications liquid crystal evfs for personal pcs/dvds small monitors, etc. ?1 e99210-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. LCX020BK
? 2 LCX020BK h s h i f t r e g i s t e r ( b i d i r e c t i o n a l s c a n n i n g ) u p / d o w n a n d / o r r i g h t / l e f t i n v e r s i o n c o n t r o l c i r c u i t v s h i f t r e g i s t e r ( b i d i r e c t i o n a l s c a n n i n g ) c o m p a d c o m s i g r 6 s i g r 5 s i g r 4 s i g r 3 s i g r 2 s i g r 1 v s s v v d d h v d d m o d e 1 e n b d w n p c g v c k v s t r g t b l k h c k 2 h c k 1 h s t p s i g b b l a c k f r a m e c o n t r o l c i r c u i t b l a c k f r a m e c o n t r o l c i r c u i t m o d e 2 m o d e 3 i n p u t s i g n a l l e v e l s h i f t e r c i r c u i t p r e c h a r g e c o n t r o l c i r c u i t 1 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 3 1 4 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 2 3 3 3 4 3 5 3 6 3 7 3 8 s i g g 6 s i g g 5 s i g g 4 s i g g 3 s i g g 2 s i g g 1 s i g b 6 s i g b 5 s i g b 4 s i g b 3 s i g b 2 s i g b 1 p s i g r p s i g g v s h i f t r e g i s t e r ( b i d i r e c t i o n a l s c a n n i n g ) b l a c k f r a m e c o n t r o l c i r c u i t block diagram the block diagram of the panel is shown below.
? 3 LCX020BK absolute maximum ratings (vss = 0v) h driver supply voltage hv dd ?.0 to +20 v v driver supply voltage vv dd ?.0 to +20 v common pad voltage com ?.0 to +17 v h shift register input pin voltage hst, hck1, hck2, ?.0 to +17 v rgt v shift register input pin voltage vst, vck, pcg, ?.0 to +17 v blk, enb, dwn mode1, mode2, mode3 video signal input pin voltage sigr1 to sigr6, ?.0 to +15 v sigg1 to sigg6, sigb1 to sigb6, psigr, psigg, psigb operating temperature topr ?0 to +70 c storage temperature tstg ?0 to +85 c operating conditions (vss = 0v) supply voltage hv dd 15.5 0.3v vv dd 15.5 0.3v input pulse voltage (vp-p of all input pins except video signal and uniformity improvement signal input pins) vin 5.0 0.5v pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 com psigr psigg psigb sigr1 sigr2 sigr3 sigr4 sigr5 sigr6 sigg1 sigg2 sigg3 sigg4 common voltage of panel uniformity improvement signal input (r) uniformity improvement signal input (g) uniformity improvement signal input (b) video signal input to panel (r-1) video signal input to panel (r-2) video signal input to panel (r-3) video signal input to panel (r-4) video signal input to panel (r-5) video signal input to panel (r-6) video signal input to panel (g-1) video signal input to panel (g-2) video signal input to panel (g-3) video signal input to panel (g-4) symbol description
? 4 LCX020BK 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 sigg5 sigg6 sigb1 sigb2 sigb3 sigb4 sigb5 sigb6 hv dd rgt mode3 mode2 mode1 hst hck1 hck2 v ss blk enb vck vst dwn pcg vv dd sout video signal input to panel (g-5) video signal input to panel (g-6) video signal input to panel (b-1) video signal input to panel (b-2) video signal input to panel (b-3) video signal input to panel (b-4) video signal input to panel (b-5) video signal input to panel (b-6) power supply input for h driver drive direction input for h shift register (h: normal, l: reverse) display area switching 3 input display area switching 2 input display area switching 1 input start pulse input for h shift register drive clock pulse input for h shift register drive clock pulse input for h shift register drive gnd (h, v drivers) black frame display pulse input gate selection pulse enable input clock pulse input for v shift register drive start pulse input for v shift register drive drive direction input for v shift register (h: normal, l: reverse) uniformity improvement pulse input power supply input for v driver h and v shift register drive checking (test pin; no connection.) pin no. symbol description
? 5 LCX020BK input equivalent circuits to prevent static charges, protective diodes are provided for each pin except the power supplies. in addition, protective resistors are added to all pins except video signal inputs. all pins are connected to vss with a high resistance of 1m (typ.). the equivalent circuit of each input pin is shown below: (resistor value: typ.) i n p u t l c l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 . 5 k w 2 . 5 k w v v d d i n p u t l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 5 0 w 2 5 0 w h v d d i n p u t l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 . 5 k w 2 . 5 k w h v d d i n p u t i n p u t h v d d s i g n a l l i n e ( 1 ) s i g r 1 t o s i g r 6 , s i g g 1 t o s i g g 6 , s i g b 1 t o s i g b 6 , p s i g r , p s i g g , p s i g b ( 2 ) h c k 1 , h c k 2 ( 3 ) r g t , m o d e 1 , m o d e 2 , m o d e 3 ( 4 ) h s t ( 5 ) p c g , v c k ( 6 ) v s t , b l k , e n b , d w n ( 7 ) c o m 1 m w 1 m w l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 5 0 w 2 5 0 w v v d d i n p u t 1 m w 1 m w 1 m w v v d d i n p u t h v d d 2 5 0 w 2 5 0 w 2 5 0 w 2 5 0 w l e v e l c o n v e r s i o n c i r c u i t ( 2 - p h a s e i n p u t ) 1 m w 1 m w 1 m w
? 6 LCX020BK input signals 1. input signal voltage conditions (vss = 0v) item h shift register input voltage hst, hck1, hck2, rgt (low) (high) (low) (high) vhil vhih vvil vvih vvc vsig vcom vpsig1 vpsig2 ?.5 4.5 ?.5 4.5 6.9 vvc ?4.5 vvc ?0.5 vvc 2.0 vvc 4.0 0.0 5.0 0.0 5.0 7.0 7.0 vvc ?0.4 vvc 3.0 vvc 4.5 0.4 5.5 0.4 5.5 7.1 vvc + 4.5 vvc ?0.3 vvc 4.0 vvc 4.6 v v v v v v v v v v shift register input voltage mode1, mode2, mode3, blk, vst, vck, pcg, enb, dwn video signal center voltage video signal input range * 1 common pad voltage of panel * 2 uniformity improvement signal input voltage (psigr, psigg, psigb) * 3 symbol min. typ. max. unit * 1 video input signal shall be symmetrical to vvc. * 2 the optimum typical value of the common pad voltage may lower its suitable voltage according to the set construction to use. in this case, use the voltage of which has maximum contrast as typical value. when the typical value is lowered, the maximum and minimum values may lower. * 3 input a uniformity improvement signals psigr, psigg and psigb in the same polarity with video signals sigr1 to 6, sigg1 to 6 and sigb1 to 6 and which is symmetrical to vvc. psigr, psigg and psigb have two steps as shown by the waveform in the figure below, and in the table above, the upper value indicates the signal level of the first step, and the lower value, the signal level of the second step. here, the rising and falling of psigr, psigg and psigb are synchronized with the rising of pcg pulse, and the rise and fall times trpsigr, trpsigg, trpsigb, tfpsigr, tfpsigg and tfpsigb are suppressed within 800ns. input waveform of uniformity improvement signal psig LCX020BK level conversion circuit the LCX020BK has a built-in level conversion circuit in the clock input unit on the panel. the input signal level increases to hv dd or vv dd . the vcc of external ics are applicable to 5 0.5v. t r p s i g r , t r p s i g g , t r p s i g b 1 0 % 9 0 % v v c p r g p s i g r , p s i g g , p s i g b v p s i g 2 v p s i g 1 t f p s i g r , t f p s i g g , t f p s i g b
? 7 LCX020BK 2. clock timing conditions (ta = 25 c) (macintosh16 mode: fhckn = 4.8mhz, fvck = 24.9khz) * 4 hckn means hck1 and hck2. * 5 blk is the timing during svga mode (fhckn = 4.0mhz, fvck = 24.0khz). this pulse is positive polarity other than in macintosh16 mode. set to l level in macintosh16 mode. hst rise time hst fall time hst data setup time hst data hold time hckn rise time * 4 hckn fall time * 4 hck1 fall to hck2 rise time hck1 rise to hck2 fall time vst rise time vst fall time vst data setup time vst data hold time vck rise time vck fall time enb rise time enb fall time vck rise/fall to enb rise time horizontal video period end to enb fall time enb fall to pcg rise time pcg rise time pcg fall time pcg rise to prg rise time pcg fall to prg fall time pcg rise to vck rise/fall time pcg pulse width blk rise time blk fall time blk fall to vst rise time blk pulse width trhst tfhst tdhst thhst trhckn tfhckn to1hck to2hck trvst tfvst tdvst thvst trvck tfvck trenb tfenb toenb tdenb topcg trpcg tfpcg toprgr toprgf tovck twpcg trblk tfblk tovst twblk 70 15 ?5 ?5 5 5 400 900 900 0 200 0 1100 1 1 80 25 0 0 10 10 500 1000 1000 250 1000 1200 30 30 90 35 30 30 15 15 100 100 15 15 100 100 100 100 30 30 1100 1300 100 100 2 ns s ns item symbol min. typ. max. unit hst hck vst vck enb pcg blk * 5 line
? 8 LCX020BK * 6 definitions: the right-pointing arrow ( ) means +. the left-pointing arrow ( ) means ? the black dot at an arrow ( ) indicates the start of measurement. hst rise time hst hck hst fall time hst data setup time hst data hold time hckn rise time * 3 hckn fall time * 3 hck1 fall to hck2 rise time hck1 rise to hck2 fall time hckn * 3 duty cycle 50% to1hck = 0ns to2hck = 0ns hckn * 3 duty cycle 50% to1hck = 0ns to2hck = 0ns hckn * 3 duty cycle 50% to1hck = 0ns to2hck = 0ns trhst tfhst tdhst thhst trhckn tfhckn to1hck to2hck item symbol waveform conditions 9 0 % 1 0 % 1 0 % 9 0 % h s t t r h s t t f h s t 5 0 % 5 0 % * 6 h s t h c k 1 t d h s t t h h s t 5 0 % 5 0 % * 3 h c k n 1 0 % 1 0 % 9 0 % 9 0 % t r h c k n t f h c k n 5 0 % 5 0 % * 6 h c k 1 t o 2 h c k t o 1 h c k 5 0 % 5 0 % h c k 2
? 9 LCX020BK vck enb vck rise time vck fall time enb rise time enb fall time vck rise/fall to enb rise time horizontal video period end to enb fall time trvck tfvck trenb tfenb toenb tdenb item symbol waveform v c k 1 0 % 1 0 % 9 0 % 9 0 % t r v c k n t f v c k n 9 0 % 9 0 % 1 0 % 1 0 % t f e n t r e n e n b e n b 5 0 % 5 0 % 5 0 % t o p c g t d e n b v c k * 6 h o r i z o n t a l v i d e o p e r i o d h o r i z o n t a l b l a n k i n g p e r i o d p c g 5 0 % t o e n b pcg * 7 pcg rise time trpcg pcg fall time tfblk pcg rise to vck rise/fall time tovst pcg pulse width twblk blk blk rise time trpcg blk fall time tfpcg blk fall to vst rise time blk pulse width tovck twblk p c g 5 0 % 5 0 % 5 0 % t w p c g t o v c k v c k * 6 b l k 5 0 % 5 0 % t o v s t v s t * 6 5 0 % t w b l k * 7 input the pulse obtained by taking the or of the above pulses and blk to the pcg input pin. vst rise time vst vst fall time vst data setup time vst data hold time trvst tfvst tdvst thvst 9 0 % 1 0 % 1 0 % 9 0 % v s t t r v s t t f v s t 5 0 % 5 0 % * 6 v s t v c k t d v s t t h v s t 5 0 % 5 0 % enb fall to pcg rise time topcg
? 10 LCX020BK electrical characteristics (ta = 25 c, hv dd = 15.5v, vv dd = 15.5v) 1. horizontal drivers item input pin capacitance hckn hst input pin current hck1 hck2 hst rgt video signal input pin capacitance current consumption chckn chst csig ih hck1 = gnd hck2 = gnd hst = gnd rgt = gnd hckn: hck1, hck2 (4.8mhz) ?00 ?000 ?00 ?50 8 8 ?10 ?50 ?80 ?0 150 16.0 13 13 270 30.0 pf pf a a a a pf ma symbol min. typ. max. unit condition 2. vertical drivers item input pin capacitance vck vst input pin current vck pcg, vst, enb, dwn, blk, mode1, mode2, mode3 current consumption cvck cvst iv ?000 ?50 8 8 ?60 ?0 3.0 13 13 5.0 pf pf a a ma symbol min. typ. max. unit condition 3. total power consumption of the panel item total power consumption of the panel (mac16) pwr 300 600 mw symbol min. typ. max. unit 4. pin input resistance item pin ?vss input resistance rpin 0.4 1 m symbol min. typ. max. unit vck = gnd pcg, vst, enb, dwn, blk, mode1, mode2, mode3 = gnd vck: (24.9khz) 5. uniformity improvement signal input capacitance item uniformity improvement signal input capacitance cpsigon 7 nf symbol min. typ. max. unit 16
? 11 LCX020BK electro-optical characteristics (ta = 25 c, ntsc mode) item contrast ratio 25 c 60 c x y x y x y 25 c 60 c 25 c 60 c 25 c 60 c r-g b-g 0 c 25 c 0 c 25 c 60 c 60 min. cr 25 cr 60 t rx ry gx gy bx by v 90-25 v 90-60 v 50-25 v 50-60 v 10-25 v 10-60 v 50rg v 50bg ton0 ton25 toff0 toff25 f yt60 40 40 0.85 0.560 0.300 0.260 0.541 0.120 0.040 0.9 1.0 1.2 1.3 1.9 1.8 70 70 1.0 0.600 0.360 0.300 0.595 0.148 0.148 1.4 1.6 1.8 1.9 2.4 2.3 ?.10 0.05 20 14 45 35 0.670 0.410 0.350 0.650 0.187 0.187 2.0 2.2 2.4 2.5 3.0 3.0 0.25 0.45 100 40 150 70 ?0 20 1 2 3 4 5 6 7 8 % cie standards v v ms db s optical transmittance chromaticity r g b v 90 v 50 v 10 on time off time v-t characteristics half tone color reproduction range response time flicker image retention time symbol measurement method min. typ. max. unit
? 12 LCX020BK

* m e a s u r e m e n t s y s t e m i i l i g h t d e t e c t o r o p t i c a l f i b e r l c d p a n e l l i g h t r e c e p t o r l e n s d r i v e c i r c u i t l i g h t s o u r c e b a s i c m e a s u r e m e n t c o n d i t i o n s ( 1 ) d r i v i n g v o l t a g e h v d d = 1 5 . 5 v , v v d d = 1 5 . 5 v v v c = 7 . 0 v , v c o m = 6 . 6 v ( 2 ) m e a s u r e m e n t t e m p e r a t u r e 2 5 c u n l e s s o t h e r w i s e s p e c i f i e d . ( 3 ) m e a s u r e m e n t p o i n t o n e p o i n t i n t h e c e n t e r o f t h e s c r e e n u n l e s s o t h e r w i s e s p e c i f i e d . ( 4 ) m e a s u r e m e n t s y s t e m s t w o t y p e s o f m e a s u r e m e n t s y s t e m a r e u s e d a s s h o w n b e l o w . ( 5 ) v i d e o i n p u t s i g n a l v o l t a g e ( v s i g ) v s i g = 7 . 0 v a c [ v ] ( v a c = s i g n a l a m p l i t u d e ) * m e a s u r e m e n t s y s t e m i l c d p a n e l l u m i n a n c e m e t e r m e a s u r e m e n t e q u i p m e n t b a c k l i g h t : c o l o r t e m p e r a t u r e 6 8 0 0 k 7 0 0 k ( 2 5 c ) * b a c k l i g h t s p e c t r u m ( r e f e r e n c e ) i s l i s t e d o n a n o t h e r p a g e . b a c k l i g h t 3 . 5 m m m e a s u r e m e n t e q u i p m e n t 1. contrast ratio contrast ratio (cr) is given by the following formula (1). cr = ... (1) l (white): surface luminance of the tft-lcd panel at the input signal amplitude v ac = 0.5v. l (black): surface luminance of the panel at v ac = 4.5v. both luminosities are measured by system i . l (white) l (black)
? 13 LCX020BK 2. optical transmittance optical transmittance (t) is given by the following formula (2). t = 100 [%] ... (2) l (white) is the same expression as defined in the "contrast ratio" section. optical transmittance is measured by system i . 3. chromaticity chromaticity of the panel is measured by system i . raster modes of each color are defined by the representations at the input signal amplitude conditions shown in the table below. system i uses x and y of the cie standards as the chromaticity here. 4. v-t characteristics v-t characteristics, or the relationship between signal amplitude and the transmittance of the panel, are measured by system ii by inputting the same signal amplitude v ac to each input pin. v 90 , v 50 , and v 10 correspond to each voltage which defines 90%, 50%, and 10% of transmittance respectively. 5. half tone color reproduction range the half tone color reproduction range of the lcd panel is characterized by the differences between the v-t characteristics of r, g and b. the differences of these v-t characteristics are measured by system ii . system ii defines signal voltages of each r, g and b raster mode which correspond to 50% of transmittance, v 50r , v 50g and v 50b respectively. v 50rg and v 50bg represent the differences between v 50r and v 50g and between v 50b and v 50g , and are given by the following formulas (3) and (4) respectively. v 50rg = v 50r ?v 50g ... (3) v 50bg = v 50b ?v 50g ... (4) 9 0 5 0 1 0 v 9 0 v 5 0 v 1 0 v a c s i g n a l a m p l i t u d e [ v ] t r a n s m i t t a n c e [ % ] signal amplitudes (v ac ) supplied to each input r input g input b input r a s t e r r g b 0.5 4.5 4.5 4.5 0.5 4.5 4.5 4.5 0.5 (unit: v) 1 0 0 5 0 0 v 5 0 r v 5 0 b v 5 0 g v a c s i g n a l a m p l i t u d e [ v ] t r a n s m i t t a n c e [ % ] v 5 0 r g v 5 0 b g g r a s t e r b r a s t e r r r a s t e r l (white) luminance of back light
? 14 LCX020BK 6. response time response time ton and toff are defined by formulas (5) and (6) respectively. ton = t1 ?ton ... (5) toff = t2 ?toff ... (6) t1: time which gives 10% transmittance of the panel. t2: time which gives 90% transmittance of the panel. the relationships between t1, t2, ton and toff are shown in the right figure. i n p u t s i g n a l v o l t a g e ( w a v e f o r m a p p l i e d t o t h e m e a s u r e d p i x e l s ) 4 . 5 v 0 . 5 v 7 . 0 v 0 v o p t i c a l t r a n s m i t t a n c e o u t p u t w a v e f o r m 1 0 0 % 9 0 % 1 0 % 0 % t o n t 1 t o n t o f f t 2 t o f f 7. flicker flicker (f) is given by the formula (7). dc and ac (mac16/svga/vga/pc98/ntsc: 30hz, rms, pal: 25hz, rms) components of the panel output signal for gray raster * mode are measured by a dc voltmeter and a spectrum analyzer in system ii . f [db] = 20log { } ... (7) 8. image retention time image retention time is given by the following procedures. apply a monoscope signal to the lcd panel for 60 minutes and then change this signal to the gray scale of vsig = 7.0 v ac [v] (v ac : 3 to 4v) so as to give the maximum image retention. hold input signal v ac . the time for the residual image to disappear gives the image retention time. * monoscope signal conditions vsig = 7.0 4.5 or 7.0 2.0 [v] (shown in the right figure) vcom = 6.6v * r, g, b input signal voltage for gray raster mode is given by vsig = 7.0 v 50 [v] where: v 50 is the signal amplitude which gives 50% of transmittance in v-t curve. b l a c k l e v e l w h i t e l e v e l v s i g w a v e f o r m 7 . 0 v 0 v 4 . 5 v 2 . 0 v 4 . 5 v 2 . 0 v ac component dc component
? 15 LCX020BK example of back light spectrum (reference) 5 . 0 0 0 e 0 1 a . u . 0 . 0 0 0 e + 0 0 3 0 0 . 0 0 8 0 0 . 0 0 w a v e l e n g t h [ n m ] s p e c t r a l d i s t r i b u t i o n d a t a
? 16 LCX020BK 4 8 d o t s 2 5 9 2 d o t s 4 8 d o t s 2 4 9 6 d o t s ( e f f e c t i v e 1 4 . 2 3 m m ) 6 2 8 d o t s 2 d o t s 2 d o t s 6 2 4 d o t s ( e f f e c t i v e 1 0 . 6 1 m m ) g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g a t e s w g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 b 4 g 4 r 5 g 5 b 5 r 6 g 6 b 6 g 1 r 1 b 1 r 2 g 2 b 2 r 3 g 3 r 4 b 3 g 4 b 6 g 1 r 1 b 1 g 1 r 1 b 1 b 4 r 5 g 5 b 5 r 6 g 6 r 6 g 6 b 6 r 6 g 6 b 6 a c t i v e a r e a p h o t o - s h i e l d i n g a 1. dot arrangement rgb dots are arranged in a stripe pattern. the shaded area is used for the dark border around the display.
? 17 LCX020BK 2. lcd panel operations [description of basic operations] a vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse to every 624 gate lines sequentially in every single horizontal scanning period. (in macintosh16 mode) a horizontal driver, which consists of horizontal shift registers, gates and cmos sample-and-hold circuits, applies selected pulses to every 2496 signal electrodes sequentially in a single horizontal scanning period. these pulses are used to supply the sampled video signal to the row signal lines. vertical and horizontal shift registers address one pixel, and then thin film transistors (tfts; two tfts for one dot) turn on to apply a video signal to the dot. the same procedures lead to the entire 2496 832 dots to display a picture in a single vertical scanning period. the data and video signals shall be input with polarity-inverted system in every horizontal cycle. [description of operating mode] the lcd panel can change the angle of view by displaying a black frame to support various signal systems. the angle of view is switched by mode1, 2 and 3. however, the picture center does not change. the angle of view mode settings are shown below. mode1 mode2 mode3 display mode l l l l h h l l h h l l l h l h l h macintosh16: 832 624 svga: 800 600 pal: 762 572 vga/ntsc: 640 480 pc98: 640 400 wide: 832 480 the lcd panel has the following functions to easily apply to various uses, as well as various signal systems. right/left inverse mode up/down inverse mode these modes are controlled by two signals (rgt and dwn). the right/left and up/down mode settings are shown in the tables below. right/left and up/down mean the direction when the pin 1 marking is located at the right side with the pin block facing upward. since the display area is located in the center of the panel in each mode, the start pulse, clock phase and polarity for both the h and v systems must be varied. the phase relationship between the start pulse and the clock for each mode is shown on the following pages. rgt mode right scan left scan h l dwn mode down scan up scan h l
? 18 LCX020BK (1) vertical direction display cycle (1.1) macintosh 16 v d v s t ( d w n = h ) v s t ( d w n = l ) v c k 1 3 2 4 6 2 1 6 2 3 6 2 2 6 2 4 v e r t i c a l d i s p l a y c y c l e 6 2 4 h (1.2) svga v d v s t ( d w n = h ) v s t ( d w n = l ) v c k 1 3 2 4 5 9 7 5 9 9 5 9 8 6 0 0 v e r t i c a l d i s p l a y c y c l e 6 0 0 h (1.3) pal v d v s t ( d w n = h ) v s t ( d w n = l ) v c k 1 3 2 4 5 6 9 5 7 1 5 7 0 5 7 2 v e r t i c a l d i s p l a y c y c l e 5 7 2 h (1.4) vga/ntsc, wide v d v s t ( d w n = h ) v s t ( d w n = l ) v c k 1 3 2 4 4 7 7 4 7 9 4 7 8 4 8 0 v e r t i c a l d i s p l a y c y c l e 4 8 0 h (1.5) pc98 v d v s t ( d w n = h ) v s t ( d w n = l ) v c k 1 3 2 4 3 9 7 3 9 9 3 9 8 4 0 0 v e r t i c a l d i s p l a y c y c l e 4 0 0 h
? 19 LCX020BK (2) horizontal direction display cycle (2.1.1) macintosh 16, wide, rgt = h h d h s t h c k 1 h c k 2 1 3 2 4 1 3 9 1 4 0 1 3 7 1 3 8 h o r i z o n t a l d i s p l a y c y c l e (2.1.2) macintosh 16, wide, rgt = l 1 3 2 4 1 3 9 1 4 0 1 3 7 1 3 8 h d h s t h c k 1 h c k 2 h o r i z o n t a l d i s p l a y c y c l e (2.2.1) svga, rgt = h h s t h c k 1 h c k 2 h d 1 2 3 4 1 3 1 1 3 2 1 3 3 1 3 4 h o r i z o n t a l d i s p l a y c y c l e (2.2.2) svga, rgt = l h s t h c k 1 1 2 3 4 1 3 1 1 3 2 1 3 3 1 3 4 h c k 2 h d h o r i z o n t a l d i s p l a y c y c l e
? 20 LCX020BK (2.3.1) pal, rgt = h 1 2 3 4 h s t h c k 1 1 2 5 1 2 6 1 2 7 1 2 8 h c k 2 h d h o r i z o n t a l d i s p l a y c y c l e (2.3.2) pal, rgt = l h s t h c k 1 1 2 3 4 1 2 5 1 2 6 1 2 7 1 2 8 h c k 2 h d h o r i z o n t a l d i s p l a y c y c l e (2.4.1) vga/ntsc/pc98, rgt = h h s t h c k 1 1 0 5 1 0 6 1 0 7 1 0 8 h c k 2 h d 1 2 3 4 h o r i z o n t a l d i s p l a y c y c l e (2.4.2) vga/ntsc/pc98, rgt = l h s t h c k 1 1 2 3 4 1 0 5 1 0 6 1 0 7 1 0 8 h c k 2 h d h o r i z o n t a l d i s p l a y c y c l e
? 21 LCX020BK 3. 18-dot simultaneous sampling the horizontal shift register performs sigr1 to sigr6, sigg1 to sigg6 and sigb1 to sigb6 signal sampling simultaneously, which requires phase matching between each signal to prevent the horizontal resolution from deteriorating. phase matching by an external signal delaying circuit is needed before applying video signals to the lcd panel. the block diagram of the delaying procedure using the sample-and-hold method is as follows. the following phase relationship diagram indicates the phase setting for right-direction scanning (rgt = high level). for left- direction scanning (rgt = low level), the phase settings should be inverted for the sigr1 to sigr6, sigg1 to sigg6 and sigb1 to sigb6 signals. s / h c k 1 c k 2 l c x 0 2 0 b k c k 3 c k 4 c k 5 s / h s / h s / h s / h s / h c k 6 s / h s / h s / h s / h s / h s i g r 1 , s i g g 1 , s i g b 1 s i g r 2 , s i g g 2 , s i g b 2 s i g r 3 , s i g g 3 , s i g b 3 s i g r 4 , s i g g 4 , s i g b 4 s i g r 5 , s i g g 5 , s i g b 5 s i g r 6 , s i g g 6 , s i g b 6 s i g r 1 , s i g g 1 , s i g b 1 s i g r 2 , s i g g 2 , s i g b 2 s i g r 3 , s i g g 3 , s i g b 3 s i g r 4 , s i g g 4 , s i g b 4 s i g r 5 , s i g g 5 , s i g b 5 s i g r 6 , s i g g 6 , s i g b 6 h c k n c k 1 c k 3 c k 5 c k 2 c k 4 c k 6 (right-direction scanning)
? 22 LCX020BK display system block diagram an example display system configuration is shown below. c x a 2 1 1 1 r c x a 2 1 1 2 r c x a 2 1 1 2 r c x a 2 1 1 2 r p l l c x d 3 5 0 0 r l c x 0 2 0 b k t i m i n g p u l s e f r p m c k h s y n c v s y n c r g b r g b
? 23 LCX020BK notes on handling (1) static charge prevention be sure to take the following protective measures. tft-lcd panels are easily damaged by static charges. a) use non-chargeable gloves, or simply use bare hands. b) use an earth-band when handling. c) do not touch any electrodes of a panel. d) wear non-chargeable clothes and conductive shoes. e) install conductive mats on the working floor and working table. f) keep panels away from any charged materials. g) use ionized air to discharge the panels. (2) protection from dust and dust a) operate in a clean environment. b) when delivered, panel surface (polarizer) is covered by a protective sheet. peel off the protective sheet carefully so as not to damage the panel. c) do not touch the polarizer surface. the surface is easily scratched. when cleaning, use a clean-room wiper with isopropyl alcohol. be careful not to leave a stain on the surface. d) use ionized air to blow dust off the polarizer. (3) other handling precautions a) do not twist or bend the flexible pc board especially at the connecting region because the board is easily deformed. b) do not drop the panel. c) do not twist or bend the panel or panel frame. d) keep the panel away from heat sources. e) do not dampen the panel with water or other solvents. f) avoid storing or using the panel at a high temperature or high humidity, which may result in panel damages.
? 24 LCX020BK package outline unit: mm t h i c k n e s s o f t h e c o n n e c t o r 0 . 2 0 . 0 3 a c t i v e a r e a p o l a r i z i n g a x i s e l e c t r o d e 1 8 . 0 0 . 3 1 2 . 0 0 . 0 5 0 . 8 0 . 1 1 . 9 0 . 3 2 . 3 3 0 . 4 2 . 7 6 1 0 . 1 1 . 0 7 5 0 . 3 0 . 0 5 0 . 3 ( 1 4 . 2 2 7 ) 1 7 . 6 0 . 3 1 9 . 6 5 0 . 1 5 1 9 . 7 5 0 . 1 5 0 . 3 0 . 3 6 3 9 3 ( 1 0 . 6 0 8 ) 1 4 . 0 0 . 3 1 . 7 5 4 0 . 1 1 8 . 2 5 0 . 1 5 1 9 . 7 5 0 . 1 5 4 7 . 7 5 0 . 9 ( 2 6 . 0 ) 5 . 0 0 . 3 1 . 5 1 . 0 0 . 3 0 . 3 0 . 0 5 0 . 3 r e i n f o r c i n g m a t e r i a l i n c i d e n t l i g h t 1 4 3 2 e l e c t r o d e ( e n l a r g e d ) p i n 1 p i n 3 9 0 . 3 0 . 0 7 p 0 . 6 0 . 0 2 1 9 = 1 1 . 4 0 . 0 3 w e i g h t 2 g d e s c r i p t i o n r e i n f o r c i n g b o a r d r e i n f o r c i n g m a t e r i a l p o l a r i z i n g f i l m f p c n o 1 2 3 4 0 . 6 0 . 0 7 p 0 . 6 0 . 0 2 1 8 = 1 0 . 8 0 . 0 3 4

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